Exploring MAC parallelization on software defined radio platforms

Recent years have witnessed a number of new and fairly complex MAC schemes for cognitive radios and other reconfigurable networks. These emerging MAC protocols impose increasing demands for flexibility, real-time response and a closer interaction between the MAC- and the physical layers. Different designs for Software Defined Radio (SDR) platforms have been investigated to realize these protocols. In this context, hardware acceleration and flexibility through hardware-software partitioning emerge as the major design considerations for prototyping and over-the-air evaluation. Following the hardware-software partitioning philosophy, this demonstration will show how MAC schemes can be decomposed into constituent functional components and how different MAC functionalities, when possible, are scheduled in a parallel fashion to enhance the execution efficiency and flexibility. In particular, we have enabled a dual-processor interrupt driven hardware architecture and supported a customized real-time Operating System (OS) kernel on the commercially available and widely used WARP SDR platform [1]. Moreover, we have adapted our framework for composing MAC protocols based on their elementary functionalities [2] to the dual-processor, OS-supported architecture on WARP boards. Our demonstration will highlight the benefits of parallelization and efficient scheduling of MAC processes in embedded realizations on SDR platforms in order to achieve a high degree of flexibility while satisfying the hard real-time constraints.