DocumentCode :
1889329
Title :
REACT: a synthesis and evaluation tool for fault-tolerant multiprocessor architectures
Author :
Clark, Jeffrey A. ; Pradhan, Dhiraj K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
fYear :
1993
fDate :
26-28 Jan 1993
Firstpage :
428
Lastpage :
435
Abstract :
A software testbed that performs automated life testing of a variety of multiprocessor architectures through simulated fault injection is discussed. It is being developed to meet the need for a generalized simulation tool which can evaluate system reliability and availability metrics while avoiding several of the limitations associated with combinatorial and Markov modeling. Incorporating detailed system, workload, and fault/error models, REACT can be more accurate and easier to use than many dependability prediction tools based on analytical approaches. The authors motivate the development of REACT, describe its features, and explain its use. Example applications for the software are provided, and its limitations are discussed
Keywords :
fault tolerant computing; life testing; multiprocessing programs; reliability; software tools; test facilities; REACT; automated life testing; availability; evaluation; fault-tolerant multiprocessor architectures; generalized simulation tool; limitations; simulated fault injection; software testbed; synthesis; system reliability; Automatic testing; Availability; Computer architecture; Fault tolerance; Life testing; Performance evaluation; Predictive models; Reliability; Software performance; Software testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability and Maintainability Symposium, 1993. Proceedings., Annual
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-0943-X
Type :
conf
DOI :
10.1109/RAMS.1993.296819
Filename :
296819
Link To Document :
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