DocumentCode :
1889336
Title :
Timing driven co-design of networked embedded systems
Author :
Ramanathan, Dinesh ; Jejurikar, Ravindra ; Gupta, Rajesh K.
Author_Institution :
Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
fYear :
2000
fDate :
9-9 June 2000
Firstpage :
117
Lastpage :
122
Abstract :
Advances in microelectronics integration have led to the emergence of tightly integrated systems with high performance network interfaces. Design of such systems especially for single chip implementation is a delicate balance of functionality and available time budget to perform the tasks. Computer-aided design tools and methodologies are needed to ensure the correctness of the design and efficiency of the design process, especially for networked systems that have strict timing requirements both due to technology as well as networking needs. We present an overview of a timing-driven design methodology for networked systems, developed at the University of California, Irvine.
Keywords :
embedded systems; hardware-software codesign; network interfaces; timing; computer-aided design tools; functionality; high performance network interfaces; microelectronics integration; networked embedded systems; single chip implementation; tightly integrated systems; time budget; timing driven co-design; Application specific integrated circuits; Computer interfaces; Computer networks; Embedded system; Hardware; Network interfaces; Network topology; Protocols; System performance; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
Conference_Location :
Yokohama, Japan
Print_ISBN :
0-7803-5973-9
Type :
conf
DOI :
10.1109/ASPDAC.2000.835081
Filename :
835081
Link To Document :
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