Title :
A new method for constructing IP level power model based on power sensitivity
Author :
Huang, Heng-Liang ; Lin, Jiing-Yuan ; Shen, Wen-Zen ; Jou, Jing-Yang
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
This paper proposes a nominal point selection method for IP (Intellectual Property) level power model based on power sensitivity. By analyzing the relationship between the dynamic power consumption of CMOS circuits and their input signal statistics, three nominal points are efficiently selected to construct a power model based on power sensitivity. Our experimental results on a number of benchmark circuits show the effectiveness of the proposed method. Estimation accuracy within 5.78% of transistor level simulations is achieved.
Keywords :
CMOS digital integrated circuits; circuit simulation; industrial property; power consumption; statistical analysis; CMOS circuits; IP level power model; Intellectual Property; accuracy; benchmark circuits; dynamic power consumption; effectiveness; estimation accuracy; input signal statistics; nominal point selection method; power sensitivity; Circuit simulation; Electronic mail; Energy consumption; Intellectual property; Power engineering and energy; Probability; Semiconductor device modeling; Signal analysis; Statistical analysis; Uncertainty;
Conference_Titel :
Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
Conference_Location :
Yokohama, Japan
Print_ISBN :
0-7803-5973-9
DOI :
10.1109/ASPDAC.2000.835084
