KressArray Xplorer: a new CAD environment to optimize reconfigurable datapath array architectures

Author

Hartenstein, R. ; Herz, M. ; Hoffmann, Th ; Nageldinger, U.

Author_Institution

Comput. Struct. Group, Kaiserslautern Univ., Germany

fYear

2000

fDate

9-9 June 2000

Firstpage

163

Lastpage

168

Abstract

This paper introduces a CAD environment for design-space exploration of coarse grain reconfigurable KressArray architectures and similar platforms, To find an optimal solution to a given application domain this KressArray Xplorer supports experimenting with different architectures. An estimator analyses the input and suggests an architecture onto which then the application is mapped using an heuristic algorithm. A graphic editor supports user interaction. The system generates performance analysis data, which is used by an automatic tool to refine the result iteratively.

Keywords

circuit CAD; circuit optimisation; integrated circuit layout; microprocessor chips; programmable logic arrays; reconfigurable architectures; C language; CAD environment; KressArray Xplorer; coarse grain reconfigurable architectures; design-space exploration; estimator; graphic editor; heuristic algorithm; iterative methods; optimal solution; performance analysis; reconfigurable datapath array architectures; Algorithm design and analysis; Design automation; Field programmable gate arrays; Graphics; Heuristic algorithms; Iterative algorithms; Performance analysis; Reconfigurable logic; Space exploration; Systolic arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific

Conference_Location

Yokohama, Japan

Print_ISBN

0-7803-5973-9

Type

conf

DOI

10.1109/ASPDAC.2000.835089

Filename

835089