DocumentCode :
1889694
Title :
Silicon lateral avalanche photodiodes fabricated by standard 0.18 µm CMOS process
Author :
Iiyama, Koichi ; Takamatsu, Hideki ; Maruyama, Takeo
Author_Institution :
Sch. of Electr. & Comput. Eng., Kanazawa Univ., Kanazawa, Japan
fYear :
2009
fDate :
20-24 Sept. 2009
Firstpage :
1
Lastpage :
2
Abstract :
A Si APD was fabricated by standard 0.18 mum CMOS process. The maximum avalanche gain was 224 for only 8 V bias. The bandwidth was 1.6 GHz for low avalanche gain and 800 MHz for large avalanche gain.
Keywords :
CMOS integrated circuits; avalanche photodiodes; silicon; APD; Si; avalanche gain; avalanche photodiodes; bandwidth 1.6 GHz; bandwidth 800 MHz; size 0.18 mum; standard CMOS process; voltage 8 V; Avalanche photodiodes; CMOS process; Decision support systems; Quadratic programming; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Optical Communication, 2009. ECOC '09. 35th European Conference on
Conference_Location :
Vienna
Print_ISBN :
978-1-4244-5096-1
Type :
conf
Filename :
5287343
Link To Document :
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