DocumentCode :
1890003
Title :
25 Gbps EML TOSA employing novel impedance-matched FPC design
Author :
Uesugi, Toshitsugu ; Okada, Norio ; Saito, Takeshi ; Yamatoya, Takeshi ; Morita, Yoshimichi ; Sugitatsu, Atsushi
Author_Institution :
Inf. Technol. R&D Center, Mitsubishi Electr. Corp., Kamakura, Japan
fYear :
2009
fDate :
20-24 Sept. 2009
Firstpage :
1
Lastpage :
2
Abstract :
25 Gbps EML TOSA employing novel impedance-matched flexible printed circuit design realizes 30 GHz 3-dB bandwidth and a low-jitter optical waveform with 39 % mask margin for 100 Gbps Ethernet applications.
Keywords :
electric connectors; electroabsorption; flexible electronics; impedance matching; jitter; local area networks; printed circuit design; EML TOSA; Ethernet applications; flexible printed circuit design; impedance-matched FPC design; low-jitter optical waveform; Flexible printed circuits; Frequency; High speed optical techniques; Impedance; Inductance; Optical design; Optical modulation; Optical reflection; Optical transmitters; Packaging;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Optical Communication, 2009. ECOC '09. 35th European Conference on
Conference_Location :
Vienna
Print_ISBN :
978-1-4244-5096-1
Type :
conf
Filename :
5287355
Link To Document :
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