• DocumentCode
    1890568
  • Title

    Design for manufacturability: a path from system level to high yielding chips

  • Author

    Strojwas, Andrzej J.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
  • fYear
    2000
  • fDate
    9-9 June 2000
  • Firstpage
    375
  • Lastpage
    376
  • Abstract
    This tutorial describes a wide spectrum of the Design for Manufacturability (DFM) activities. We start by presenting a new approach to IC design, which takes full advantage of leading edge technology. Then we propose a new methodology for acceleration of yield ramping which accounts for all the dominant yield loss mechanisms and a set of software tools that have been developed to address the yield learning problems. Several real-life examples demonstrate the practical results of employing such a yield ramping strategy.
  • Keywords
    circuit CAD; circuit optimisation; design for manufacture; integrated circuit design; integrated circuit yield; IC design; design analysis; design for manufacturability; high yielding chips; software tools; system level; yield data analysis; yield diagnosis; yield prediction; yield ramping; Acceleration; Circuit testing; Data analysis; Design for manufacture; Fabrication; Manufacturing processes; Production; Semiconductor device manufacture; Software tools; Time to market;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
  • Conference_Location
    Yokohama, Japan
  • Print_ISBN
    0-7803-5973-9
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2000.835127
  • Filename
    835127