DocumentCode
1890594
Title
Low-power silicon architectures for wireless communications
Author
Rabaey, Jan M.
Author_Institution
Wireless Res. Center, California Univ., Berkeley, CA, USA
fYear
2000
fDate
9-9 June 2000
Firstpage
377
Lastpage
380
Abstract
Wireless communication and networking is experiencing a dramatic growth, and all indicators point to an extension of this growth in the foreseeable future. This paper reflects on the demands and the opportunities offered with respect to the integrated implementation of these applications in the "systems-on-a-chip" era.
Keywords
computer architecture; digital signal processing chips; elemental semiconductors; modems; radiocommunication; silicon; telecommunication computing; CMOS; Si; computational complexity; low-power silicon architectures; reconfigurable architectures; superintegration; systems-on-chip; wireless communication; Application software; Art; Costs; Electronic mail; Energy efficiency; Information systems; Moore´s Law; Pervasive computing; Silicon; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
Conference_Location
Yokohama, Japan
Print_ISBN
0-7803-5973-9
Type
conf
DOI
10.1109/ASPDAC.2000.835128
Filename
835128
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