Development of dual-channel high-speed data acquisition card based on PCI bus

Author

Wang Liu ; Yunfeng Liu ; Liyan Qiao

Author_Institution

Dept. of Autom. Test & Control, Harbin Inst. of Technol., Harbin, China

fYear

2013

fDate

16-19 Sept. 2013

Firstpage

1

Lastpage

5

Abstract

This paper develops a dual channel high speed data acquisition card based on PCI bus, with 1GSa/s dual-channel sampling rate and 2GSa/s single-channel sampling rate, 8-bit of resolution, and 2GB of high-speed data cache. This paper puts forward an overall scheme of the system, and uses key ADC chip(ADC08D1000) to realize the acquisition of dual channel/single channel signal, and uses DDR2 SDRAM to store the acquired data, and uses FPGA to control the DAQ card, uses PCI9054 to realize the PCI interface, which support DMA transformation. At last, the dynamic parameters (including THD, SINAD, ENOB) testing of the DAQ card is presented. The testing result shows that, the acquisition card has high dynamic performance, and the ENOB is about 7 bit within bandwidth.

Keywords

DRAM chips; analogue-digital conversion; cache storage; data acquisition; field programmable gate arrays; memory cards; peripheral interfaces; signal sampling; ADC chip; ADC08D1000; DAQ card testing; DDR2 SDRAM; DMA; ENOB; FPGA; PCI interface bus; PCI9054; cache data storage; channel sampling rate; channel signal; dual channel high-speed data acquisition card; dynamic parameter; Bandwidth; Clocks; Data acquisition; Field programmable gate arrays; Noise; Signal generators; Signal resolution; DDR2 SDRAM memory; FPGA; High-speed data acquisition; PCI9054;

fLanguage

English

Publisher

ieee

Conference_Titel

AUTOTESTCON, 2013 IEEE

Conference_Location

Schaumburg, IL

ISSN

1088-7725

Print_ISBN

978-1-4673-5681-7

Type

conf

DOI

10.1109/AUTEST.2013.6645039

Filename

6645039