• DocumentCode
    1890875
  • Title

    Feasible two-way circuit partitioning with complex resource constraints

  • Author

    Lee, Hsun-Cheng ; Wang, Ting-Chi

  • Author_Institution
    Dept. of Inf. & Comput. Eng., Chung Yuan Christian Univ., Chung Li, Taiwan
  • fYear
    2000
  • fDate
    9-9 June 2000
  • Firstpage
    435
  • Lastpage
    440
  • Abstract
    We study in this paper the feasibility problem for two-way circuit partitioning subject to complex resource constraints. We first prove that the problem is in general NP-complete. We then consider two special cases of the problem, and present polynomial-time algorithms for them. Finally we give a backtracking algorithm to solve the general case. To reduce the run time and the storage space of the backtracking algorithm, an incremental flow computation technique is employed. For each algorithm presented in this paper, the corresponding experimental results are also given to support its efficiency. To the best of our knowledge, this paper is the first one to address the feasibility problem for two-way circuit partitioning with complex resource constraints.
  • Keywords
    VLSI; circuit optimisation; computational complexity; logic CAD; logic partitioning; polynomial approximation; NP-complete; VLSI; backtracking algorithm; complex resource constraints; feasibility problem; incremental flow computation technique; polynomial-time algorithms; run time; storage space; two-way circuit partitioning; Area measurement; Circuit simulation; Constraint optimization; Cost function; Iterative algorithms; Iterative methods; Partitioning algorithms; Polynomials; Simulated annealing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
  • Conference_Location
    Yokohama, Japan
  • Print_ISBN
    0-7803-5973-9
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2000.835139
  • Filename
    835139