A transistor-based high-order analog predistorter with memory correction for WCDMA applications

A transistor-based high-order analog predistorter (APD) with memory correction for wide-band code division multiple access (WCDMA) applications is reported. The transistor-based third-order intermodulation (IM3) generator employs the nonlinearity of the low-power gain amplifier with a low V_CC. The diode-based fifth-order intermodulation (IM5) generator uses the nonlinearity of the anti-parallel connected Schottky diodes. Therefore, the proposed APD with various delay differences on each nonlinear paths cancels the IM3s and IM5s by compensating for memory effects of the power amplifier (PA), respectively. For the validations, the proposed APD is constructed with 90-W class-AB PA and tested using a two-tone signal with 2-MHz tone spacing and a three-carrier WCDMA signal at 2.14 GHz. Form the measured results, the proposed fifth-order APD shows the significant IM3 and IM5 cancellation and the notable adjacent channel leakage ratio improvement.