FPGAs as cryptanalytic tools

This paper presents FPGA implementations of two cryptanalytic attacks against DES. Linear cryptanalysis results from Matsui´s (1994) work but could not be applied as such and had to be modified to face hardware constraints. We broke a key in about 14 hours on one single FPGA, becoming the fastest implementation to our knowledge. In parallel, we evaluated the possibility of a cryptanalytic time-memory tradeoff using distinguished points. The original idea from Hellman (1980) has never been implemented. We performed first experimental results and designed a machine that can break a 40-bit DES in about 15 seconds, with a high success rate (72%), using one PC. An exhaustive search of the key on the same PC would have taken about 50 days.