DocumentCode
1891970
Title
Model-T: Rethinking the OS for terabit speeds
Author
Bruijn, Willemde ; Bos, Herbert
Author_Institution
Vrije Univ. Amsterdam, Amsterdam
fYear
2008
fDate
13-18 April 2008
Firstpage
1
Lastpage
6
Abstract
This paper presents Model-T, an OS network stack designed to scale to terabit rates through pipelined execution of micro operations. Model-T parallelizes execution on multicore chips and enforces lockstep processing to maximize shared L2 data cache (d-cache) hitrate. Executing all operations without hitting main memory more than once (if at all) is the key design principle behind Model-T. We show a prototype implementation that indeed handles terabit rate network traffic when accessing only the L2 cache and processing only headers. Additionally, we present a more practical implementation of Model-T that is under development for Linux 2.6. Finally, we introduce an affordable test infrastructure based on general purpose graphics processor computation (GPGPU) that can replay network streams at PCI Express saturation rates (up to 128 Gbps), to benchmark Model-T and similar research network stacks.
Keywords
Linux; cache storage; computer networks; digital signal processing chips; L2 cache; Linux; Model-T; PCI Express; d-cache hitrate; general purpose graphics processor computation; lockstep processing; multicore chips; network streams; network traffic; shared L2 data cache; terabit speeds; Bandwidth; Computer architecture; Delay; Graphics; Hardware; Multicore processing; Prefetching; Signal design; Telecommunication traffic; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
INFOCOM Workshops 2008, IEEE
Conference_Location
Phoenix, AZ
Print_ISBN
978-1-4244-2219-7
Type
conf
DOI
10.1109/INFOCOM.2008.4544642
Filename
4544642
Link To Document