Abstract :
A novel design approach, related to the design of embedded systems and called component-based system-on-chip (CB-SoC), is described. This design is applied to IEEE 802.11 wireless LAN products, and comprises both real-time software as well as system-on-a-chip (SOC) hardware. First, the system requirements are identified and captured in a database. A behavioral model is generated for the product composed of medium access control (MAC) and the physical layer (PHY). Following verification of the captured requirements and adding additional derived requirements and differentiating features, the various components are analyzed for complexity and a timing analysis is performed. This important, since the data transfer rates in the 802.11a system exceed 54 MB/s, putting stringent requirements on the speed performance. The components are then structurally designed, integrated and tested. During all these steps, it is not predetermined which of the components are to be implemented in software and which in hardware. This allows maximum flexibility during the mapping phase to adapt to various platforms. Furthermore, this methodology is foundry/semiconductor technology independent, and allows for design reusability in multi standard communication systems. This approach cuts down the design time by about 50%, which is important for digital communication systems where the market dynamics impose stringent requirements on the time-to-market and the development cost.
Keywords :
digital radio; embedded systems; hardware-software codesign; integrated circuit design; telecommunication equipment; wireless LAN; IEEE 802.11; complexity; component-based system-on-chip; data transfer rates; development cost; embedded systems; real-time software; time-to-market; timing analysis; wireless LAN; Embedded system; Hardware; Media Access Protocol; Performance analysis; Physical layer; Product design; Real time systems; Spatial databases; System-on-a-chip; Wireless LAN;