DocumentCode :
1893300
Title :
Effect of express lots on production dispatching rule scheduling and cost in final test process of LSI manufacturing system
Author :
Chikamura, Akihisa ; Nakamae, Koji ; Fujioka, Hiromu
Author_Institution :
Dept. of Inf. Syst. Eng., Osaka Univ., Japan
fYear :
1997
fDate :
6-8 Oct 1997
Abstract :
In order to evaluate the effect of express lots on production dispatching rule scheduling and cost, we applied the event-driven simulation analysis to a real final test facility of one-chip microcomputer. Simulated results show that when the dispatching rule in the express lot assignment is changed from usually used FIFO rule to JIG+RPM rule, the allowable percentage of express lots in total arrival lots increases from 15% to 55%. In JIG+RPM rule, the time required for jig exchange and for temperature change, and also the remaining processing time of the machine in use are considered
Keywords :
discrete event simulation; dispatching; integrated circuit manufacture; large scale integration; production control; production testing; test facilities; JIG+RPM rule; LSI manufacturing system; event-driven simulation analysis; express lots; final test facility; final test process; jig exchange; processing time; production dispatching rule scheduling; temperature change; total arrival lots; Costs; Discrete event simulation; Dispatching; Job shop scheduling; Large scale integration; Microcomputers; Modeling; Production; System testing; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing Conference Proceedings, 1997 IEEE International Symposium on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-3752-2
Type :
conf
DOI :
10.1109/ISSM.1997.664527
Filename :
664527
Link To Document :
بازگشت