DocumentCode
1893364
Title
Ultra-thin gate dielectric reliability projections
Author
Moosa, M. ; Haggag, A. ; Liu, N. ; Kalpat, S. ; Kuffler, M. ; Menke, D. ; Abramowitz, P. ; Ramon, M.E. ; Tseng, H.-H. ; Luo, T.-Y. ; Lim, S. ; Grudowski, P. ; Jiang, J. ; Min, B.W. ; Weintraub, J. Jiang B -W Min C ; Chen, J. ; Wong, S. ; Paquette, C. ; An
Author_Institution
Freescale Semicond., Inc., Austin, TX, USA
fYear
2005
fDate
9-11 May 2005
Firstpage
129
Lastpage
133
Abstract
Phenomenological time-dependent dielectric breakdown (TDDB) and bias-temperature instability (BTI) models are demonstrated to enable reasonably accurate reliability projections for several generations of silicon oxynitride-based transistors and circuits with EOT down to ∼1.3 nm. Furthermore, while reliability and performance can be traded-off by engineering the gate dielectric coupled with device integration, benchmarking of published data suggests that the reliability achievable at each transistor node falls within an intrinsically plausible range for similar dielectric films. A preliminary investigation of high-k dielectric device reliability suggests that a similar methodology can be adopted to project the reliability of scaled high-k films.
Keywords
MOSFET; semiconductor device breakdown; semiconductor device models; semiconductor device reliability; bias-temperature instability; dielectric film; dielectric reliability; gate dielectric; high-k dielectric device; silicon oxynitride circuits; silicon oxynitride transistors; time-dependent dielectric breakdown; transistor node; ultra-thin gate; Coupling circuits; Data engineering; Dielectric breakdown; Dielectric devices; Dielectric films; High K dielectric materials; High-K gate dielectrics; Integrated circuit reliability; Reliability engineering; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuit Design and Technology, 2005. ICICDT 2005. 2005 International Conference on
Print_ISBN
0-7803-9081-4
Type
conf
DOI
10.1109/ICICDT.2005.1502609
Filename
1502609
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