• DocumentCode
    1893568
  • Title

    The impact of variability on design methodology

  • Author

    Visweswariah, Chandu

  • Author_Institution
    IBM Res., Yorktown Height, NY, USA
  • fYear
    2005
  • fDate
    9-11 May 2005
  • Firstpage
    161
  • Abstract
    Increased variability will have a profound impact on design methodologies for the 65 and 45 nm nodes. Statistical timing will obviously be a key ingredient. This presentation will examine the state-of-the-art in statistical timing, the diagnostics that timing can provide to improve design robustness and performance, the impact of variability on design styles, and the role of statistical timing in aiding synthesis, test and timing sign-off.
  • Keywords
    integrated circuit design; timing; 45 nm; 65 nm; design methodology; design performance; design robustness; statistical timing; variability impact; Design methodology; Robustness; Testing; Timing; USA Councils;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuit Design and Technology, 2005. ICICDT 2005. 2005 International Conference on
  • Print_ISBN
    0-7803-9081-4
  • Type

    conf

  • DOI
    10.1109/ICICDT.2005.1502619
  • Filename
    1502619