Title :
Nano scaled low power leakage st-based SRAM
Author :
Amalraj, K. ; Sathishkumar, P. ; Vigneshraja, K. ; Arunkumar, N. ; Anjo, C.A.
Abstract :
The main purpose of this paper work is to reduce leakage power and to produce stable output at lower supply voltages for SRAM circuits in 180*10-9m. Generally the power dissipation in conventional SRAM circuits will be high. In order to overcome that problem, a new SRAM circuit based on Schmitt trigger (ST) is introduced which consumes very less power than conventional SRAMs. Here SOI-DTMOS (Silicon on insulator-dynamic threshold MOS) are utilized in order to have low supply voltage and stability during operations.
Keywords :
MOS integrated circuits; MOSFET; SRAM chips; circuit stability; electrical faults; elemental semiconductors; integrated circuit design; low-power electronics; silicon; silicon-on-insulator; trigger circuits; SOI-DTMOS transistors; Schmitt trigger; Si; lower supply voltage; nanoscaled low power leakage ST-based SRAM circuit design; power dissipation; silicon on insulator-dynamic threshold MOS; stability; Leakage reduction; Low power SRAM; SOI-DTMOS; low threshold Schmitt trigger;
Conference_Titel :
Emerging Trends in Electrical Engineering and Energy Management (ICETEEEM), 2012 International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4673-4633-7
DOI :
10.1109/ICETEEEM.2012.6494475
