Design, optimization, and characterization of a low temperature RPECVD MOS gate stack process

Author

Parker, Christopher G. ; Silvestre, Conrad ; Watkins, Mike ; Keuhn, R.T. ; Hauser, John R.

Author_Institution

NSF Eng. Res. Center for Adv. Electron. Mater. Process., North Carolina State Univ., Raleigh, NC, USA

fYear

1993

fDate

18-19 May 1993

Firstpage

208

Lastpage

212

Abstract

Plasma-enhanced chemical vapor deposition (PECVD) allows film deposition in very short times and at low substrate temperatures. The use of remote plasma-enhanced chemical vapor deposition (RPECVD) to deposit an oxide insulator layer for a MOS gate stack structure within a single-wafer processing system is reported. The project background including government and industry support is presented. The design of the RPECVD chamber and optimization of deposition parameters are discussed. Characterization of the oxide quality through device testing is presented

Keywords

insulated gate field effect transistors; integrated circuit technology; integrated circuit testing; plasma CVD; MOS gate stack structure; MOSFET; RPECVD chamber design; deposition parameters optimisation; device testing; film deposition; oxide quality characterisation; remote plasma-enhanced chemical vapor deposition; single-wafer processing system; substrate temperatures; Chemical vapor deposition; Design optimization; Government; Insulation; Plasma applications; Plasma chemistry; Plasma materials processing; Plasma temperature; Substrates; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

University/Government/Industry Microelectronics Symposium, 1993., Proceedings of the Tenth Biennial

Conference_Location

Research Triangle Park, NC

ISSN

0749-6877

Print_ISBN

0-7803-0990-1

Type

conf

DOI

10.1109/UGIM.1993.297054

Filename

297054