Title :
Substrate coupling analysis and simulation for an industrial phase-locked loop
Author :
Welch, Ryan J. ; Yang, Andrew T.
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
fDate :
31 May-3 Jun 1998
Abstract :
Current injected into the common chip substrate from fast-switching digital devices can affect the operation of sensitive analog circuits in mixed signal designs. An industrial Phase-Locked Loop (PLL) is analyzed with the non-ideal substrate modeled to show the effects of substrate coupling. Detailed simulation results strongly correlate to the measured circuit jitter. Additional results show that well guard structures should not be used and the effectiveness of ohmic guarding structures depends on number, location in the layout, and the bias scheme
Keywords :
integrated circuit modelling; jitter; mixed analogue-digital integrated circuits; phase locked loops; substrates; circuit jitter; industrial PLL; industrial phase-locked loop; mixed signal designs; nonideal substrate model; ohmic guarding structures; simulation; substrate coupling analysis; Analog circuits; Analytical models; Capacitance; Circuit simulation; Coupling circuits; Phase locked loops; Power supplies; Signal design; Substrates; Switching circuits;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.705220
