FPGA implementation of SVPWM technique for asymmetrical six-phase VSI

This paper presents the performance investigation of FPGA implementation of SVPWM technique for asymmetrical six-phase voltage source inverter (VSI). Six-phase voltage source inverters are dominantly used to supply the six-phase drives which are used for high power applications. It is necessary to develop appropriate space vectors for the inverters to provide required output voltages to a six phase machine. In the SVPWM technique a large space vectors are detailed. The performances of the asymmetrical 6-phase VSI is analyzed in terms of fundamental voltage and THD. The selection of active space vector and zero vectors are discussed and the possibilities of FPGA implementations are analyzed. The proposed FPGA implementation of SVPWM technique has been simulated in MATLAB/SIMULINK and experimentally validated through a XILINX (XC3SD1800A)-based prototype.