A wafer bonded SOI structure for intelligent power ICs

A novel isolation structure has been developed for intelligent power ICs based on wafer bonding technology. In this method of isolation, an Si-SiO₂ coexistent surface is directly bonded to a silicon base wafer, resulting in SiO₂ films buried in part of the composite substrate. This structure makes it easy to isolate control circuits from power output devices. It enables the monolithic integration of output devices having high-current and high-breakdown voltage capability and CMOS control circuits. The authors describe the details of this technology and its application to an intelligent power IC which needs a breakdown voltage of more than 600 V