DocumentCode :
1896169
Title :
Implementation of floating-point operations for 3D graphics on a coarse-grained reconfigurable architecture
Author :
Jo, Manhwee ; Arava, V. K Prasad ; Yang, Hoonmo ; Choi, Kiyoung
Author_Institution :
Design Automation Laboratory, School of EE/CS Seoul National University, South Korea
fYear :
2007
fDate :
26-29 Sept. 2007
Firstpage :
127
Lastpage :
130
Abstract :
With the increasing requirements for more flexibility and higher performance in embedded systems design, reconfigurable computing has become more popular. There have been many coarse-grained reconfigurable architectures proposed and/or commercialized. But most of the existing architectures cannot be used for applications that require floating-point operations, since they have only integer units. In this paper, we present how we can perform various floating-point operations on a coarse-grained reconfigurable array of integer processing elements. We demonstrate the effectiveness of our approach through the implementation of various floating-point operations for 3D graphics and their performance analysis.
Keywords :
Communication system control; Computer architecture; Costs; Design automation; Graphics; Laboratories; Logic design; Reconfigurable architectures; Reconfigurable logic; Reduced instruction set computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2007 IEEE International
Conference_Location :
Hsin Chu, Taiwan
Print_ISBN :
978-1-4244-1592-2
Electronic_ISBN :
978-1-4244-1593-9
Type :
conf
DOI :
10.1109/SOCC.2007.4545442
Filename :
4545442
Link To Document :
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