DocumentCode
1896262
Title
Industrial experience with cycle error computation of cycle-accurate transaction level models
Author
Junghee Lee ; Joonhwan Yi
Author_Institution
Telecommunication R&D Center, Samsung Electronics, Suwon City, Gyeonggi-do, Korea
fYear
2007
fDate
26-29 Sept. 2007
Firstpage
155
Lastpage
158
Abstract
Transaction level modeling is gaining increasing popularity with the increasing design complexity of the system-on-a-chip. Transaction level models are frequently built from existing register transfer level models, which usually cause cycle errors. Measurable indicators of cycle errors are necessary, and their definitions are important. This paper presents the challenges in cycle error computation and our proposed method, although its effectiveness has not been proved formally. The main contribution of our study is to report an industrial experience with cycle error computation.
Keywords
Communication industry; Computational modeling; Computer industry; Delay; Energy consumption; Power measurement; Software measurement; System-on-a-chip; Time measurement; Yield estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference, 2007 IEEE International
Conference_Location
Hsin Chu, Taiwan
Print_ISBN
978-1-4244-1592-2
Electronic_ISBN
978-1-4244-1593-9
Type
conf
DOI
10.1109/SOCC.2007.4545448
Filename
4545448
Link To Document