DocumentCode
1896469
Title
Early selection of system implementation choice among SoC, SoP and 3-D Integration
Author
Weerasekera, Roshan ; Zheng, Li-Rong ; Pamunuwa, Dinesh ; Tenhunen, Hannu
Author_Institution
ECS/ICT/KTH, ELECTRUM 229, 164 40 Kista, Sweden
fYear
2007
fDate
26-29 Sept. 2007
Firstpage
187
Lastpage
190
Abstract
Recently there is a tendency for shifting the planar SoC single-chip solutions to different alternative options as tiled silicon and single-level embedded modules as well as 3-D integration, and the designers confronted with several system design options. To get a true improvement in performance, a very careful analysis using detailed models at different hierarchical levels is crucial. In this work, we present a cohesive analysis of the technological, cost and performance trade-offs for implementing digital and mixed-mode systems considering the choices between 2-D and 3-D integration and their ramifications.
Keywords
Assembly; Costs; Performance analysis; Power system modeling; Shape; Silicon; Stacking; System analysis and design; Temperature; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference, 2007 IEEE International
Conference_Location
Hsin Chu, Taiwan
Print_ISBN
978-1-4244-1592-2
Electronic_ISBN
978-1-4244-1593-9
Type
conf
DOI
10.1109/SOCC.2007.4545455
Filename
4545455
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