• DocumentCode
    1896529
  • Title

    Multilevel MPSOC simulation using an MDE approach

  • Author

    Atitallah, Rabie Ben ; Piel, Eric ; Niar, Smail ; Marquet, Philippe ; Dekeyser, Jean Luc

  • Author_Institution
    INRIA FUTURS - LIFL - University of Lille, France
  • fYear
    2007
  • fDate
    26-29 Sept. 2007
  • Firstpage
    197
  • Lastpage
    200
  • Abstract
    In this paper, we first present an efficient Multi-Processor Systems-on-Chip design methodology based on Model-Driven Engineering. Later, a deployment profile is introduced to allow IP reuse and to carry multilevel implementation details. With this methodology, simulations at different levels are automatically generated, reducing the cost of targeting several levels. A compilation chain has been developed to transform the high abstraction level into both CABA and PVT simulation levels. The effectiveness of the methodology is illustrated by the development of an H.263 encoder.
  • Keywords
    Computational modeling; Computer architecture; Concurrent computing; DSL; Domain specific languages; Field programmable gate arrays; Hardware design languages; Model driven engineering; Parallel processing; Synchronous generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference, 2007 IEEE International
  • Conference_Location
    Hsin Chu, Taiwan
  • Print_ISBN
    978-1-4244-1592-2
  • Electronic_ISBN
    978-1-4244-1593-9
  • Type

    conf

  • DOI
    10.1109/SOCC.2007.4545457
  • Filename
    4545457