DocumentCode :
1896576
Title :
A Hierarchical Verification Procedure of Timed Petri-Net Model for Real-Time Embedded Systems
Author :
Wang, Hanbo ; Zhou, Xingshe ; Dong, Yunwei ; Tang, Lei
Author_Institution :
Sch. of Comput. Sci., Northwestern Polytech. Univ., Xi´´an, China
fYear :
2010
fDate :
25-26 Dec. 2010
Firstpage :
1
Lastpage :
4
Abstract :
A novel approach to verify the timed Petri-Net model is proposed in this paper. A non-instantaneous model is abstracted from the timed Petri-Net model in a hierarchical structure. The non-instantaneous model which is verified with a model-checking tool is used to reduce the state space of the timed Petri-Net model for verification with a satisfiability modulo theories solver. The proposed approach is applied in verifying the non-functional properties of real-time embedded systems.The timed Petri-Net is used to model the interacting relations of the software components and the binding relations between software and hardware. A platform-independent model which abstracted from the scheduling model is transformed into the non-instantaneous model.The performance evaluation shows the improvement on the running time for verification with the proposed approach.
Keywords :
Petri nets; embedded systems; formal verification; hierarchical verification procedure; model checking tool; noninstantaneous model; realtime embedded systems; scheduling model; timed Petri-net model; Computational modeling; Embedded systems; Fires; Mathematical model; Real time systems; Specification languages;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Engineering and Computer Science (ICIECS), 2010 2nd International Conference on
Conference_Location :
Wuhan
ISSN :
2156-7379
Print_ISBN :
978-1-4244-7939-9
Electronic_ISBN :
2156-7379
Type :
conf
DOI :
10.1109/ICIECS.2010.5678146
Filename :
5678146
Link To Document :
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