Title :
Comparison of chip crossing delay in various packaging environments
Author_Institution :
Hewlett Packard Co., Palo Alto, CA, USA
Abstract :
The effect of packaging on computer performance is becoming increasingly significant because of delay due to package parasitics and connectivity between functional blocks. The first issue is addressed with an example of how chip crossing delay is influenced by the choice of packaging environment. Five separate packaging technologies are investigated. Simulation of this delay is useful for comparing packaging technologies and can provide guidelines for making appropriate choices to a system designer
Keywords :
packaging; performance evaluation; chip crossing delay comparison; computer performance; packaging environments; simulation; Bonding; Ceramics; Collision mitigation; Computer performance; Delay effects; Driver circuits; Electronics packaging; Frequency; Integrated circuit interconnections; Milling machines;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-1971-6
DOI :
10.1109/ICCD.1989.63362
