DocumentCode :
189710
Title :
Design of UART controller for FPGA with Simulink®
Author :
Kralev, Jordan
Author_Institution :
Department of Systems and Control Technical University of Sofia Sofia, Bulgaria
fYear :
2014
fDate :
15-19 June 2014
Firstpage :
44
Lastpage :
47
Abstract :
Simple UART (Universal Asynchronous Receiver Transmitter) controller, compatible with RS232 standard is implemented on Spartan-3E FPGA, through automatic HDL code generation and hardware synthesis. The paper shows how the design can be entirely conveyed in MATLAB/Simulink® environment. There is no need for additional behaviour description in HDL. Results from simulation and experiments verify functionality of the controller.
Keywords :
Delays; Field programmable gate arrays; MATLAB; Mathematical model; Radiation detectors; Receivers; FPGA design flow; Simulink® HDL Coder; digital system simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Computing (MECO), 2014 3rd Mediterranean Conference on
Conference_Location :
Budva, Montenegro
Print_ISBN :
978-1-4799-4827-7
Type :
conf
DOI :
10.1109/MECO.2014.6862655
Filename :
6862655
Link To Document :
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