Title :
Hierarchical interconnect modeling
Author_Institution :
Res. Div., IBM Corp., Austin, TX, USA
Abstract :
Interconnect parasitics are competing with devices for impact on performance and therefore accurate interconnect modeling is called for. However, fully accurate 3D modeling is not always necessary nor feasible and a hierarchical modeling approach is advocated. Electromagnetic models, transmission lines, and lumped elements can be incorporated as linear circuit elements, reduced, and simulated with device-level models.
Keywords :
circuit analysis computing; digital simulation; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; transmission lines; device-level models; electromagnetic models; hierarchical interconnect modeling; interconnect parasitics; linear circuit elements; lumped elements; transmission lines; Circuit simulation; Distributed parameter circuits; Electromagnetic modeling; Equations; Integrated circuit interconnections; Integrated circuit modeling; Linear circuits; Semiconductor device modeling; Timing; Voltage;
Conference_Titel :
Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-4100-7
DOI :
10.1109/IEDM.1997.649479