Implementation of digital pulse doppler radar signal generator and receiver

In this paper, hardware implementation of digital pulse Doppler radar signals generator and receiver based on FPGA is explained. Different performances have been noticed while using CORDIC and Hilbert transform cores for the phase shifter blocks in the implementation of generator and receiver parts. Algorithms are implemented on the Xilinx Virtex-4 FPGA. Required hardware area, resolution and amplitude of Doppler frequency at the output of the receiver are compared for different implementation with altering the phase shifter block.