Title :
A scalable design approach for stencil computation on reconfigurable clusters
Author :
Xinyu Niu ; Coutinho, J.G.F. ; Luk, Wayne
Author_Institution :
Dept. of Comput., Imperial Coll. London, London, UK
Abstract :
Stencil-based algorithms are known to be computationally intensive and used in many scientific applications. The scalability of stencil algorithms in large-scale clusters is limited by data dependency between distributed workload. This paper proposes a scalable communication model to schedule communication operations based on available resources and algorithm properties. Experimental results from the Maxeler MPC-C500 computing system with four Virtex-6 SX475T FPGAs demonstrate linear speedup.
Keywords :
field programmable gate arrays; logic design; reconfigurable architectures; Maxeler MPC-C500 computing system; Virtex-6 SX475T FPGA; large-scale cluster; reconfigurable cluster; scalable communication model; scalable design approach; stencil-based algorithm; Algorithm design and analysis; Computer architecture; Field programmable gate arrays; Hardware; Parallel processing; Peak to average power ratio; System-on-chip;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location :
Porto
DOI :
10.1109/FPL.2013.6645551
