DocumentCode
1898023
Title
A hardware security scheme for RRAM-based FPGA
Author
Yi-Chung Chen ; Wei Zhang ; Li, Hai Helen
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Pittsburgh, Pittsburgh, PA, USA
fYear
2013
fDate
2-4 Sept. 2013
Firstpage
1
Lastpage
4
Abstract
To enhance the system integrity of FPGA-based embedded systems on hardware design, we propose a hardware security scheme for nonvolatile resistive random access memory (RRAM) based FPGA, in which internal block RAM (BRAMs) are used for configuration and temporary data storage. The proposed scheme loads obfuscated configurations into nonvolatile BRAMs to protect design data from physical attacks and utilizes Chip DNA to enable logic function.
Keywords
embedded systems; field programmable gate arrays; random-access storage; security of data; FPGA; RRAM; chip DNA; configuration data storage; embedded systems; hardware design; hardware security scheme; internal block RAM; logic function; nonvolatile BRAMs; nonvolatile resistive random access memory; physical attacks; system integrity; temporary data storage; DNA; Field programmable gate arrays; Hardware; Nonvolatile memory; Random access memory; Routing; Security;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location
Porto
Type
conf
DOI
10.1109/FPL.2013.6645556
Filename
6645556
Link To Document