DocumentCode :
1898150
Title :
Performance evaluation of Sparse Matrix-Matrix Multiplication
Author :
Jain-Mendon, Shweta ; Sass, Ron
Author_Institution :
Reconfigurable Comput. Syst. Lab., Univ. of North Carolina at Charlotte, Charlotte, NC, USA
fYear :
2013
fDate :
2-4 Sept. 2013
Firstpage :
1
Lastpage :
4
Abstract :
The conventional matrix multiplication algorithms that are suitable for dense matrices do not perform well on the corresponding Sparse Matrix-Matrix Multiplication (SMMM) operation. In particular, they do not utilize the sparsity of the matrix. This paper describes a new technique for performing the SMMM operation using a novel storage format for sparse matrices. To demonstrate the feasibility of this technique, the SMMM operation is implemented on an FPGA and various parameters that affect the performance of the design are explored.
Keywords :
field programmable gate arrays; mathematics computing; matrix multiplication; sparse matrices; FPGA; SMMM operation; dense matrices; performance evaluation; sparse matrix-matrix multiplication; Arrays; Field programmable gate arrays; Finite element analysis; Hardware; Random access memory; Sparse matrices;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location :
Porto
Type :
conf
DOI :
10.1109/FPL.2013.6645561
Filename :
6645561
Link To Document :
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