Title :
CMOS on bonded wafers fabricated using a novel Si-Ge etch stop
Author :
King, E.E. ; Huang, D.H. ; Leonov, P. ; Palkuti, L.J. ; Campisi, G.J. ; Hughes, H.L. ; Godbey, D.J.
Author_Institution :
Adv. Res. & Applications Corp., Sunnyvale, CA, USA
Abstract :
The bond-and-etchback silicon-on-insulator (BESOI) substrates utilize a novel silicon-germanium etch-stop fabrication method to produce a device-film which is thin, defect-free, and highly resistive. Other features of these BESOI substrates include a high-quality thermal oxide at all silicon/insulator interfaces and a buried isolation layer which is fabricated using a radiation-hardened process. Results are presented for CMOS devices and circuits fabricated on these BESOI substrates for which the device-films are 0.25-μm thick. Test results indicate that circuit performance is improved by more than 30% over the bulk controls and is not adversely affected by incorporating buried layers, and gate and field oxides optimized for radiation environments in the BESOI process
Keywords :
CMOS integrated circuits; Ge-Si alloys; etching; integrated circuit technology; radiation hardening (electronics); semiconductor-insulator boundaries; 0.25 micron; BESOI substrates; CMOS; Si-Ge etch stop; SiGe; bond-and-etchback silicon-on-insulator; bonded wafers; buried isolation layer; circuit performance; defect free film; device-film; etch-stop fabrication method; high-quality thermal oxide; radiation-hardened process; silicon/insulator interfaces; CMOS process; CMOS technology; Circuit testing; Etching; Germanium silicon alloys; Silicon germanium; Silicon on insulator technology; Space technology; Substrates; Wafer bonding;
Conference_Titel :
SOI Conference, 1991. Proceedings, 1991., IEEE International
Conference_Location :
Vail Valley, CO
Print_ISBN :
0-7803-0184-6
DOI :
10.1109/SOI.1991.162882
