Title :
Design of a multi GBPS Single Carrier digital baseband for 60GHz applications and its FPGA implementation
Author :
Guntur, Surendra ; Jansen, Feike ; Hoogerbrugge, Jan ; Abkari, Lotfi ; Vos, Eric
Author_Institution :
NXP Semicond., Eindhoven, Netherlands
Abstract :
This paper describes the system architecture, design methodology and subsequent FPGA mapping of a millimeter wave digital baseband for wireless communication in the 60GHz spectral band. The baseband is designed to be compliant with the 802.11ad Single Carrier and Control PHY draft specifications and supports a data rate of 2.5Gbps at the physical layer. The demanding throughput and latency requirements are achieved with a parallel implementation. However, due to limited capacity of the FPGAs present in our prototype platform and complex partitioning requirements, only a scaled down version of the full single carrier baseband that operates at 1/10th the throughput of the specification could be mapped. A minimal real-time hardware MAC was also incorporated and coupled with a 60GHz RF beam-forming front-end to demonstrate file transfer between two independent FPGA prototyping systems. A system throughput of 59Mbps was achieved at the application layer using π/2 QPSK modulation with a 13/16 LDPC code rate.
Keywords :
field programmable gate arrays; parity check codes; quadrature phase shift keying; radiocommunication; 802.11ad single carrier; FPGA mapping; FPGA prototyping system; LDPC code rate; QPSK modulation; beam-forming front-end; bit rate 2.5 Gbit/s; frequency 60 GHz; millimeter wave digital baseband; multiGBPS single carrier digital baseband; real-time hardware MAC; system architecture; wireless communication; Application specific integrated circuits; Baseband; Field programmable gate arrays; Parallel processing; Radio frequency; Receivers; Throughput;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location :
Porto
DOI :
10.1109/FPL.2013.6645573