Title :
Weasel: A platform-independent streaming-optimized SATA controller
Author :
Lehmann, Patrick ; Frank, Timo ; Knodel, Oliver ; Kohler, Sophie ; Preuser, Thomas B. ; Spallek, Rainer G.
Author_Institution :
Dept. of Comput. Sci., Tech. Univ. Dresden, Dresden, Germany
Abstract :
Field-Programmable Gate Arrays, which are widely used as prototyping platforms, are intruding the domain of custom-specific high-performance hardware accelerators, which operate highly efficiently by exploiting bit- and word-level parallelism. One opportunity to feed these FPGA accelerators with Gbytes of data is the direct attachment of mass-storage devices through a Serial-ATA link. State-of-the-art SATA controllers are designed and optimized for microprocessor-based systems with a random memory access pattern. Our approach, named Weasel, introduces a modularized, platform-independent and streaming-optimized SATA controller, which supports link speeds up to 6 Gbit/s. We demonstrate how to customize the given ATA standard and how to design a generic interface for different vendor-specific multi-gigabit transceivers. Implementations of the platform-independent interface for the Xilinx Virtex-5 and the Altera StratixII GX devices prove our concept. Finally, our measurements using hard-disk and solid-state drives prove a sustained throughput of 540 Mbytes/s over a SATA 6 Gbit/s link achievable. This is close to the theoretical maximum, which is constrained by the attached devices as by the speed of their flash memory.
Keywords :
field programmable gate arrays; hardware description languages; microcomputers; random-access storage; ATA standard; Altera StratixII GX devices; FPGA accelerators; Weasel; Xilinx Virtex-5; bit-level parallelism; custom-specific high-performance hardware accelerators; field programmable gate arrays; flash memory; generic interface edsign; hard-disk drives; link speeds; mass-storage devices; microprocessor-based systems; modularized SATA controller; platform-independent interface; platform-independent streaming-optimized SATA controller; random memory access pattern; serial-ATA link; solid-state drives; vendor-specific multigigabit transceivers; word-level parallelism; Bandwidth; Clocks; Databases; Field programmable gate arrays; Hardware; Physical layer; Transceivers;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location :
Porto
DOI :
10.1109/FPL.2013.6645576