Title :
Parasitic bipolar transistor induced latch and degradation in SOI MOSFET´s
Author :
Her, Tzong-Dar ; Liu, Patrick S. ; Quon, David S. ; Li, G.P. ; Kjar, Ray ; White, Joe
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Abstract :
Direct measurement data show close correlation between the turn-on of a parasitic source-body-drain bipolar transistor and the single-transistor latch in SOI (silicon-on-insulator) MOSFETs. Interface state density generation and hot hole trapping in the gate oxide have been observed for SOI MOSFETs biased in this latch regime. Furthermore, experimental and simulation results show that SOI MOSFETs in the latch state are more immune to hot-carrier stresses than in the nonlatch state. The activation of a parasitic bipolar transistor is shown to induce the single-transistor latch and cause the degradation in SOI MOSFETs. However, the higher floating-body potential in SOI MOSFETs tends to make them less vulnerable to hot-carrier stress
Keywords :
bipolar transistors; insulated gate field effect transistors; semiconductor technology; semiconductor-insulator boundaries; MOSFETs; SOI; Si-SiO2; degradation; floating-body potential; hot carrier stress immunity; hot hole trapping; induced degradation; induced latch; interface state density generation; latch regime; measurement data; parasitic bipolar transistor; single-transistor latch; source-body-drain bipolar transistor; Bipolar transistors; Current measurement; Data engineering; Degradation; Digital communication; Hot carriers; Interface states; Laboratories; MOSFET circuits; Stress;
Conference_Titel :
SOI Conference, 1991. Proceedings, 1991., IEEE International
Conference_Location :
Vail Valley, CO
Print_ISBN :
0-7803-0184-6
DOI :
10.1109/SOI.1991.162888