DocumentCode :
1898573
Title :
Problems and issues in SOI CMOS technology
Author :
Colinge, Jean-Pierre
fYear :
1991
fDate :
1-3 Oct 1991
Firstpage :
126
Lastpage :
127
Abstract :
Various issues in SOI (silicon-on-insulator) CMOS technology are reviewed. In particular, it is pointed out that from a device standpoint, the `nice´ properties of FD SOI MOSFETs, such as high saturation current and sharp subthreshold slope, are now overshadowed by unwanted floating substrate effects. The most serious of these is caused by the lateral bipolar, which causes snapback in long-channel devices. The snapback reduces to low BVDS in shorter-channel devices. There are indications that SOI may have a better BVDS than bulk for L<0.3 μm. The physics underlying hot-carrier degradation effects remains basically unresolved in thin-film SOI devices. At the circuit level, SPICE versions of SOI MOSFET models need to be commercially available, as well as cell libraries. ESD protection structures, using either diode or snapback transistors, have to be assessed
Keywords :
CMOS technology; Degradation; Hot carrier effects; Hot carriers; MOSFETs; Physics; Silicon on insulator technology; Substrates; Thin film circuits; Thin film devices;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 1991. Proceedings, 1991., IEEE International
Conference_Location :
Vail Valley, CO
Print_ISBN :
0-7803-0184-6
Type :
conf
DOI :
10.1109/SOI.1991.162889
Filename :
162889
Link To Document :
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