Title :
A digital architecture for real-time nonuniformity correction of infrared focal-plane arrays
Author :
Redlich, Rodolfo ; Figueroa, Miguel
Author_Institution :
Dept. of Electr. Eng., Univ. of Concepcion, Concepción, Chile
Abstract :
We present a custom digital architecture that implements the Constant Range algorithm for nonuniformity correction of infrared focal plane arrays. This scene-based technique uses the statistics of the acquired video stream to compensate the gain and offset nonuniformity of the infrared imager online. We evaluate the performance of our architecture while processing raw infrared video at 60 frames per second, with a resolution of 640×480 14-bit pixels. Our implementation of the Constant Range algorithm on a Xilinx Spartan-6 LX45 FPGA uses 1.8% of logic and 26% of arithmetic resources of the chip, consuming only 29.5mW of power.
Keywords :
field programmable gate arrays; focal planes; parallel architectures; video signal processing; video streaming; Xilinx Spartan-6 LX45 FPGA; acquired video stream; arithmetic resources; constant range algorithm; custom digital architecture; gain nonuniformity; infrared focal plane arrays; infrared focal-plane arrays; infrared imager online; logic resources; offset nonuniformity; performance evaluation; raw infrared video; real-time nonuniformity correction; scene-based technique; Approximation algorithms; Cameras; Clocks; Field programmable gate arrays; PSNR; Random access memory; Streaming media;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location :
Porto
DOI :
10.1109/FPL.2013.6645589