• DocumentCode
    1899019
  • Title

    A radiation hard 1750 μP fabricated on improved silicon on sapphire

  • Author

    Kerr, J.A. ; Garraway, A. ; Shaw, C.M. ; Wootten, D.

  • Author_Institution
    GEC Plessey Semicond., Lincoln, UK
  • fYear
    1991
  • fDate
    1-3 Oct 1991
  • Firstpage
    166
  • Lastpage
    167
  • Abstract
    The authors describe work on an improved silicon-on-sapphire fabrication process and its application to advanced VLSI circuits. The main objective of this work has been to control and minimize the radiation-induced leakage of integrated circuits by generating rigorous material procurement specifications. This goal has been achieved with two new wafer procurement specifications. In addition, the original vendor material post-radiation variability has been significantly reduced
  • Keywords
    CMOS integrated circuits; VLSI; integrated circuit technology; microprocessor chips; radiation hardening (electronics); semiconductor-insulator boundaries; SOS CMOS IC; Si-Al2O3; VLSI; fabrication process; material procurement specifications; post-radiation variability; radiation-induced leakage; wafer procurement specifications; Pipeline processing; Procurement; Semiconductor materials; Silicon; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference, 1991. Proceedings, 1991., IEEE International
  • Conference_Location
    Vail Valley, CO
  • Print_ISBN
    0-7803-0184-6
  • Type

    conf

  • DOI
    10.1109/SOI.1991.162909
  • Filename
    162909
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1899019