Design aspects and characterised performance of a wideband DRFM for radar test and evaluation

In the realm of test and evaluation of modern radars by means of hardware in the loop (HIL) simulators, it is becoming more important for the digital radio frequency memory (DRFM) that is utilised to have wideband performance and high fidelity in order to generate realistic target returns. This paper highlights important design aspects of wideband DRFM design on printed circuit board (PCB) and also presents the architecture of the DRFM that was implemented using commercial-off-the-shelf (COTS) components. The spurious-free-dynamic-range (SFDR) of the DRFM was characterised as −47 dBc worst-case over an instantaneous bandwidth of 800 MHz. Target returns generated by the DRFM and an optical delay line (ODL) were measured using an experimental pulse Doppler radar and are presented in this paper.