Title :
IEE Colloquium on `Syntheses and Optimisation of Logic Systems´ (Digest No.1994/066)
Abstract :
The following topics were dealt with: mixed representations; multi-level optimisation; VLSI; logic gates; minimum-size implementations; PLAs; simulated annealing; behavioural descriptions; fuzzy logic; and asynchronous controllers
Keywords :
VLSI; fuzzy logic; logic CAD; logic arrays; many-valued logics; optimisation; PLAs; VLSI; asynchronous controllers; behavioural descriptions; fuzzy logic; logic gates; minimum-size implementations; mixed representations; multi-level optimisation; simulated annealing;
Conference_Titel :
Synthesis and Optimisation of Logic Systems, IEE Colloquium on
Conference_Location :
London
