DocumentCode :
1899196
Title :
10MHz 64 Bit Error Tolerant Signature Recognition Circuit
Author :
Leary, Paul O´ ; Orben, Hans Josef
Author_Institution :
Member IEEE, Intermetall, Halbleiterwerk der Deutsche ITT Industries GmbH., Hans-Bunte-StraÃ\x9fe 19, 7800 Freiburg, West Germany
fYear :
1987
fDate :
23-25 Sept. 1987
Firstpage :
177
Lastpage :
181
Abstract :
This paper a circuit will be presented which identifies a 64 bit synchronization word in a serial incoming data stream. The signature is identified when the incoming data stream matches a previously known and stored signature. It is also possible to program the number of bit errors permissible for recognition of the signature. The circuit was fabricated in a 1.5¿m CMOS technology for use in a D2MAC television decoder. The circuit operates at data rates up to 20MHz and covers an area of 1.4 × 0.1 mm2
Keywords :
Buildings; CMOS technology; Circuits; Decoding; Delay; Equations; Logic; Registers; Switches; TV;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-state Circuits Conference, 1987. ESSCIRC '87. 13th European
Conference_Location :
Taunus-Tagungs-Zentrum, F.R. Germany
Print_ISBN :
3800715341
Type :
conf
Filename :
5434925
Link To Document :
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