Integration of Cu/SiOC in dual damascene interconnect for 0.1 μm technology using a new SiC material as dielectric barrier

Author

Fayolle, M. ; Torres, J. ; Passemard, G. ; Fusalba, F. ; Fanget, G. ; Louis, D. ; Arnaud, L. ; Girault, V. ; Cluzel, J. ; Feldis, H. ; Rivoire, M. ; Louveau, O. ; Mourier, T. ; Broussous, L.

Author_Institution

Lab d´´Electron. et de Technol. de l´´Inf., CEA, Centre d´´Etudes Nucleaires de Grenoble, France

fYear

2002

fDate

2002

Firstpage

39

Lastpage

41

Abstract

This work was focused on the integration of Cu/SiOC dual damascene interconnect modules for 0.1 μm node technology. A complete study was performed on the impact of the dielectric barrier material on the integration approach. It was shown that a nitrogen free SiC barrier layer was necessary to integrate SiOC in the currently used via first dual damascene architecture. The performance of this new material was evaluated in terms of etching selectivity, resist poisoning and ARC lithography behaviour, electrical and reliability results. On all these aspects, SiC was found better than SiCN.

Keywords

copper; dielectric thin films; integrated circuit interconnections; integrated circuit reliability; permittivity; silicon compounds; 0.1 micron; ARC lithography behaviour; Cu-SiOC-SiC; Cu/SiOC; dielectric barrier material; dielectric constant; dual damascene interconnect modules; etching selectivity; low-k dielectric; reliability results; resist poisoning; Copper; Dielectric materials; Etching; Lithography; Materials reliability; Nitrogen; Resists; Silicon carbide; Thermal stability; Thermal stresses;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2002. Proceedings of the IEEE 2002 International

Print_ISBN

0-7803-7216-6

Type

conf

DOI

10.1109/IITC.2002.1014880

Filename

1014880