Title :
A self-adaptive image processing application based on evolvable and scalable hardware
Author :
Gallego, Angel ; Mora, Javier ; Otero, Andres ; Lopez, B. ; de la Torre, E. ; Riesgo, T.
Author_Institution :
Center of Ind. Electron., Univ. Politec. de Madrid, Madrid, Spain
Abstract :
Evolvable Hardware (EH) is a technique that consists of using reconfigurable hardware devices whose configuration is controlled by an Evolutionary Algorithm (EA). Our system consists of a fully-FPGA implemented scalable EH platform, where the Reconfigurable processing Core (RC) can adaptively increase or decrease in size. Figure 1 shows the architecture of the proposed System-on-Programmable-Chip (SoPC), consisting of a MicroBlaze processor responsible of controlling the whole system operation, a Reconfiguration Engine (RE), and a Reconfigurable processing Core which is able to change its size in both height and width. This system is used to implement image filters, which are generated autonomously thanks to the evolutionary process. The system is complemented with a camera that enables the usage of the platform for real time applications.
Keywords :
evolutionary computation; filtering theory; image processing; microprocessor chips; system-on-chip; MicroBlaze processor; evolutionary algorithm; evolutionary process; evolvable hardware; fully-FPGA implemented scalable EH platform; image filters; real time applications; reconfigurable hardware devices; reconfigurable processing core; reconfiguration engine; scalable hardware; self-adaptive image processing; system-on-programmable-chip; Cameras; Computer architecture; Fault tolerance; Fault tolerant systems; Hardware; Noise; Real-time systems;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location :
Porto
DOI :
10.1109/FPL.2013.6645631