DocumentCode
1900515
Title
Investigation of HIL interfaces in nonlinear load studies
Author
Paran, S. ; Edrington, C.S. ; Vural, B.
Author_Institution
Center of Adv. Power Syst., Florida State Univ., Tallahassee, FL, USA
fYear
2012
fDate
9-11 Sept. 2012
Firstpage
1
Lastpage
6
Abstract
We report on the power hardware in the loop (PHIL) interfaces with respect to a nonlinear load. The stability criteria can be affected by systems which contain highly nonlinear loads thus this paper looks into the behavior of such a system. For the power interface of the HIL, five different methods are used and the buck converter is considered as the nonlinear load which serves as the hardware under test (HUT). Two important characteristics of the PHIL are stability and accuracy which are tested on the system. In this paper four configurations are discussed for the buck converter as the HUT which results in different stability and accuracy of the output voltage. The output voltage errors of the five methods are compared in this paper. All of the analysis is done with Matlab/Simulink.
Keywords
circuit analysis computing; circuit stability; digital simulation; power convertors; HIL interfaces; HUT; Matlab-Simulink; buck converter; hardware under test; nonlinear load study; output voltage errors; power hardware in the loop interfaces; stability criteria; Hardware; Integrated circuit modeling; Mathematical model; Power system stability; Resistance; Time domain analysis; Time varying systems; Accuracy; buck converter; nonlinear load; power hardware in the loop (PHIL); power interface; stability;
fLanguage
English
Publisher
ieee
Conference_Titel
North American Power Symposium (NAPS), 2012
Conference_Location
Champaign, IL
Print_ISBN
978-1-4673-2306-2
Electronic_ISBN
978-1-4673-2307-9
Type
conf
DOI
10.1109/NAPS.2012.6336360
Filename
6336360
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