Optimization of perimeter gated SPADs in a standard CMOS process

Perimeter gated single photon avalanche diodes (PGSPADs) in standard CMOS processes have increased breakdown voltages and improved dark count rates. These devices use a polysilicon gate to reduce the premature breakdown of the device. This work characterizes the variation in PGSPAD noise (dark count rate) and breakdown voltage as a function of applied gate voltages for varying device shape, size, and junction type. Eight different PGSPADs were designed and fabricated in standard 0.5μm 2 poly, 3 metal CMOS process. Our study showed the size of the device has negligible effect on the breakdown voltage of the device. The dark count rate for a circular shaped device is higher than a square shaped device but the effect of excess bias on the noise of the circular shaped device is less. Using a psub/n-well junction instead of an n-well/p⁺ junction increased the breakdown voltage. The effects of five factors: the size, the shape, the type of junction, the excess bias voltage and the gate voltage were investigated in this work.