A capacitive pressure sensor with minimum foot print for CMOS integration

A novel capacitive pressure sensor with minimum foot print is presented. This sensor is fabricated by implementing an ultrahigh-aspect-ratio deep trench etch process to build vertically integrated sensing membranes and reference electrodes on a silicon chip. The bulk silicon membranes are isolated at their bottom sides via counter-doped regions. Each sensor element is surrounded by ventilation channels, connecting membranes to the ambient atmosphere via openings at the chip side or in the metallization stack. The cavities and ventilation channels are sealed by a high density plasma oxide without any need of sacrificial layer deposition and removal. A single element with two sensing membranes and cavities for a capacitive read out has a lateral size of less than one micron and a depth of eight microns. By this approach, very compact sensors are achieved, reaching a capacitive sensitivity per area of up to 50aF/(μm2·bar), surpassing by far all common surface integrated sensor designs.